Focusing on reset coding static analysis

indicates CONFIRMED TO RUN

  • Date: Wednesday May 29, 2024
  • Duration: 30min (with live Q&A)
  • Time: 11:00 – 11:30 (CEST)
  • Presenter: Dr Reuven Dobkin
  • Attendance: FREE!

 

Webinar Overview

An incorrect implementation of asynchronous or synchronous resets may lead to functional failures and long debug times. During this webinar we review a few cases of problematic reset coding styles. We show how these cases can be automatically discovered statically by LINT tools, shortening the debug time, and improving the design reliability.

 

If you have any queries, please contact info@vsyncc.com

vSync Circuits


Datum
29 mei 2024

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