Core|Vision biedt FPGA trainingen, zoals aangegeven in het trainingsschema hieronder. Staat uw gewenste training er niet bij of past de datum niet in uw agenda? Neem dan contact op met Core|Vision om te bespreken hoe we dit kunnen aanpassen aan uw behoeften.

juni - 2017

Datum Categorie Training Locatie Prijs
26 - 27
Embedded Embedded Systems Software Design Heesch
€ 1.450,00
26 - 30
Doulos ARM Cortex-A53/A57 Software Design (Online) Online
€ 2.300,00
28 - 29
Doulos Expert VHDL Design Heesch
€ 1.945,00
29 - 30
Embedded Embedded Systems Design Heesch
€ 1.450,00

juli - 2017

Datum Categorie Training Locatie Prijs
03 - 04
Embedded Zynq All Programmable SoC System Architecture Heesch
€ 1.450,00
03 - 06
Doulos Vivado HLS (Online) Online
€ 1.600,00
05 - 06
Embedded Advanced Features and Techniques of Embedded Systems Design Heesch
€ 1.450,00
07
Embedded Advanced Features and Techniques of Embedded Systems Software Design Heesch
€ 750,00
24 - 28
Doulos Designing Embedded Systems with Yocto (Online) Online
€ 2.300,00
31 - 04
Doulos Developing With Embedded Linux (Online) Online
€ 2.300,00

augustus - 2017

Datum Categorie Training Locatie Prijs
15 - 16
Vivado Designing with the UltraScale and UltraScale+ Architectures Heesch
€ 1.450,00
17 - 18
Digital Design Essential Digital Design Techniques Heesch
€ 1.695,00
21 - 22
Vivado Designing FPGAs Using the Vivado Design Suite 1 Heesch
€ 1.450,00
23 - 24
Vivado Designing FPGAs Using the Vivado Design Suite 2 Heesch
€ 1.450,00
28 - 29
Vivado Designing FPGAs Using the Vivado Design Suite 3 Heesch
€ 1.450,00
30 - 31
Vivado Designing FPGAs Using the Vivado Design Suite 4 Heesch
€ 1.450,00

september - 2017

Datum Categorie Training Locatie Prijs
05 - 06
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 1.450,00
07 - 08
DSP DSP Design Using System Generator Heesch
€ 1.450,00
12
Vivado Vivado Design Suite for ISE Software Project Navigator Users Heesch
€ 750,00
13 - 15
Vivado Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users Heesch
€ 2.175,00
15
Vivado UltraFast Design Methodology Heesch
€ 750,00
25 - 29
Doulos Comprehensive VHDL Heesch
€ 3.595,00
25 - 27
Doulos VHDL for Designers Heesch
€ 2.495,00
28 - 29
Doulos Advanced VHDL Heesch
€ 1.795,00

oktober - 2017

Datum Categorie Training Locatie Prijs
03 - 04
Embedded Embedded Systems Design Heesch
€ 1.450,00
05 - 06
Embedded Embedded Systems Software Design Heesch
€ 1.450,00
16 - 17
Vivado Xilinx Partial Reconfiguration Tools & Techniques Heesch
€ 1.450,00
18 - 19
Embedded Advanced Features and Techniques of Embedded Systems Design Heesch
€ 1.450,00
23 - 24
Embedded Zynq All Programmable SoC System Architecture Heesch
€ 1.450,00
25 - 26
DSP C-based Design: High-Level Synthesis with Vivado HLS Heesch
€ 1.450,00
27
Embedded Embedded C/C++ SDSoC Development Environment and Methodology Heesch
€ 750,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
ISE Essentials of FPGA Design Heesch
€ 1.450,00
-
ISE Designing for Performance Heesch
€ 1.450,00
-
ISE Advanced FPGA Implementation Heesch
€ 1.450,00
-
ISE Essential Design with the PlanAhead Analysis and Design Tool Heesch
€ 750,00
-
ISE Advanced Design with the PlanAhead Analysis and Design Tool Heesch
€ 1.450,00
-
ISE Designing with the Virtex-5 FPGA Family Heesch
€ 750,00
-
ISE Designing with the Spartan-6 FPGA Families Heesch
€ 1.450,00
-
ISE Designing with the Virtex-6 Families Heesch
€ 1.450,00
-
ISE Designing with the Spartan-6 and Virtex-6 FPGA Families Heesch
€ 2.175,00
-
ISE FPGA Design Techniques for Lower Cost Heesch
€ 750,00
-
ISE Designing with Verilog Heesch
€ 2.175,00
-
ISE Debugging Techniques using the ChipScope Pro Tools Heesch
€ 1.450,00
-
Vivado Essential Tcl Scripting for the Vivado Design Suite Heesch
€ 750,00
-
Vivado Designing with the 7 Series Families Heesch
€ 1.450,00
-
Connectivity How to Design a High-Speed Memory Interface Heesch
€ 1.450,00
-
Embedded C Language Programming with SDK Heesch
€ 1.450,00
-
Embedded Embedded Design with PetaLinux Tools Heesch
€ 1.450,00