Trainingsschema - Core|Vision

Core|Vision biedt FPGA trainingen, zoals aangegeven in het trainingsschema hieronder. Staat uw gewenste training er niet bij of past de datum niet in uw agenda? Neem dan contact op met Core|Vision om te bespreken hoe we dit kunnen aanpassen aan uw behoeften.

juni - 2018

Datum	Categorie	Training	Locatie	Prijs
04 - 08	Doulos	ARM Cortex-A53/A57 Software Design (Online)	Online	€ 2.395,00
13 - 15	Connectivity	Designing with Multi-Gigabit Serial I/O	Heesch	€ 2.250,00
18 - 19	Embedded	Embedded Systems Design	Heesch	€ 1.500,00
20 - 21	Embedded	Embedded Systems Software Design	Heesch	€ 1.500,00
25 - 26	FPGA	Designing FPGAs Using the Vivado Design Suite 1	Heesch	€ 1.500,00
25 - 26	FPGA	Vivado Design Suite for ISE Software Project Navigator Users	Heesch	€ 1.500,00
27 - 28	FPGA	Designing FPGAs Using the Vivado Design Suite 2	Heesch	€ 1.500,00
27 - 28	FPGA	Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users	Heesch	€ 1.500,00

juli - 2018

Datum	Categorie	Training	Locatie	Prijs
02 - 03	Embedded	Advanced Features and Techniques of Embedded Systems Design	Heesch	€ 1.500,00
04	Embedded	Advanced Features and Techniques of Embedded Systems Software Design	Heesch	€ 750,00
09 - 10	FPGA	Designing FPGAs Using the Vivado Design Suite 3	Heesch	€ 1.500,00
09 - 10	FPGA	Xilinx Partial Reconfiguration Tools & Techniques	Heesch	€ 1.500,00
11 - 12	FPGA	Designing FPGAs Using the Vivado Design Suite 4	Heesch	€ 1.500,00
11 - 12	Vivado	UltraFast Design Methodology	Heesch	€ 1.500,00
16 - 17	DSP	C-based Design: High-Level Synthesis with the Vivado HLx Tool	Heesch	€ 1.500,00
18	Embedded	SDSoC Development Environment and Methodology	Heesch	€ 750,00
19 - 20	Embedded	Advanced SDSoC Development Environment and Methodology	Heesch	€ 1.500,00
23 - 24	FPGA	Designing with the 7 Series Families	Heesch	€ 1.500,00
23 - 24	FPGA	Designing with the UltraScale and UltraScale+ Architectures	Heesch	€ 1.500,00
23 - 27	Doulos	Developing With Embedded Linux (Online)	Online	€ 2.395,00
25 - 26	Embedded	Zynq All Programmable SoC System Architecture	Heesch	€ 1.500,00

augustus - 2018

Datum	Categorie	Training	Locatie	Prijs
14 - 15	DSP	Essential DSP Implementation Techniques for Xilinx FPGAs	Heesch	€ 1.500,00
16 - 17	DSP	DSP Design Using System Generator	Heesch	€ 1.500,00
21 - 22	Digital Design	Essential Digital Design Techniques	Heesch	€ 1.695,00
27 - 31	Doulos	Expert VHDL	Heesch	€ 3.795,00
27 - 28	Doulos	Expert VHDL Design	Heesch	€ 1.945,00
29 - 31	Doulos	Expert VHDL Verification	Heesch	€ 2.595,00

september - 2018

Datum	Categorie	Training	Locatie	Prijs
03 - 07	Doulos	Comprehensive VHDL	Heesch	€ 3.595,00
03 - 05	Doulos	VHDL for Designers	Heesch	€ 2.495,00
06 - 07	Doulos	Advanced VHDL	Heesch	€ 1.795,00
18 - 19	FPGA	Designing FPGAs Using the Vivado Design Suite 1	Heesch	€ 1.500,00
18 - 19	FPGA	Vivado Design Suite for ISE Software Project Navigator Users	Heesch	€ 1.500,00
20 - 21	FPGA	Designing FPGAs Using the Vivado Design Suite 2	Heesch	€ 1.500,00
20 - 21	FPGA	Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users	Heesch	€ 1.500,00
24 - 25	FPGA	Designing FPGAs Using the Vivado Design Suite 3	Heesch	€ 1.500,00
24 - 25	Vivado	UltraFast Design Methodology	Heesch	€ 1.500,00
26 - 27	FPGA	Designing FPGAs Using the Vivado Design Suite 4	Heesch	€ 1.500,00
26 - 27	FPGA	Xilinx Partial Reconfiguration Tools & Techniques	Heesch	€ 1.500,00

november - 2018

Datum	Categorie	Training	Locatie	Prijs
26 - 30	Doulos	Expert VHDL	Heesch	€ 3.795,00
26 - 27	Doulos	Expert VHDL Design	Heesch	€ 1.945,00
28 - 30	Doulos	Expert VHDL Verification	Heesch	€ 2.595,00

december - 2018

Datum	Categorie	Training	Locatie	Prijs
10 - 14	Doulos	Comprehensive VHDL	Heesch	€ 3.595,00
10 - 12	Doulos	VHDL for Designers	Heesch	€ 2.495,00
13 - 14	Doulos	Advanced VHDL	Heesch	€ 1.795,00

Op Aanvraag

Datum	Categorie	Training	Locatie	Prijs
-	ISE	Essentials of FPGA Design	Heesch	€ 1.500,00
-	ISE	Designing for Performance	Heesch	€ 1.500,00
-	ISE	Advanced FPGA Implementation	Heesch	€ 1.500,00
-	ISE	Essential Design with the PlanAhead Analysis and Design Tool	Heesch	€ 750,00
-	ISE	Advanced Design with the PlanAhead Analysis and Design Tool	Heesch	€ 1.500,00
-	ISE	Designing with the Virtex-5 FPGA Family	Heesch	€ 750,00
-	ISE	Designing with the Spartan-6 FPGA Families	Heesch	€ 1.500,00
-	ISE	Designing with the Virtex-6 Families	Heesch	€ 1.500,00
-	ISE	Designing with the Spartan-6 and Virtex-6 FPGA Families	Heesch	€ 2.250,00
-	ISE	FPGA Design Techniques for Lower Cost	Heesch	€ 750,00
-	ISE	Designing with Verilog	Heesch	€ 2.250,00
-	ISE	Debugging Techniques using the ChipScope Pro Tools	Heesch	€ 1.500,00
-	Vivado	Essential Tcl Scripting for the Vivado Design Suite	Heesch	€ 750,00
-	Connectivity	How to Design a High-Speed Memory Interface	Heesch	€ 1.500,00
-	Embedded	C Language Programming with SDK	Heesch	€ 1.500,00