Core|Vision biedt FPGA trainingen, zoals aangegeven in het trainingsschema hieronder. Staat uw gewenste training er niet bij of past de datum niet in uw agenda? Neem dan contact op met Core|Vision om te bespreken hoe we dit kunnen aanpassen aan uw behoeften.

december - 2017

Datum Categorie Training Locatie Prijs
14 - 15
Vivado Designing with the UltraScale and UltraScale+ Architectures Heesch
€ 1.450,00
18 - 19
Embedded Embedded Systems Software Design Heesch
€ 1.450,00
18 - 19
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 1.450,00
18 - 22
Doulos Developing With Embedded Linux (Online) Online
€ 2.095,00
20 - 21
DSP DSP Design Using System Generator Heesch
€ 1.450,00

januari - 2018

Datum Categorie Training Locatie Prijs
08 - 09
Embedded Embedded Systems Design Heesch
€ 1.500,00
10 - 11
Embedded Embedded Systems Software Design Heesch
€ 1.500,00
15 - 16
Vivado Designing FPGAs Using the Vivado Design Suite 1 Heesch
€ 1.500,00
15 - 16
Vivado Vivado Design Suite for ISE Software Project Navigator Users Heesch
€ 1.500,00
17 - 18
Vivado Designing FPGAs Using the Vivado Design Suite 2 Heesch
€ 1.500,00
17 - 18
Vivado Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users Heesch
€ 1.500,00
22 - 23
Vivado Designing FPGAs Using the Vivado Design Suite 3 Heesch
€ 1.500,00
22 - 23
Vivado Xilinx Partial Reconfiguration Tools & Techniques Heesch
€ 1.500,00
24 - 25
Vivado Designing FPGAs Using the Vivado Design Suite 4 Heesch
€ 1.500,00
24 - 25
Vivado UltraFast Design Methodology Heesch
€ 1.500,00
29 - 02
Doulos Comprehensive VHDL Heesch
€ 3.595,00
29 - 31
Doulos VHDL for Designers Heesch
€ 2.495,00

februari - 2018

Datum Categorie Training Locatie Prijs
01 - 02
Doulos Advanced VHDL Heesch
€ 1.795,00
05 - 06
Vivado Designing with the 7 Series Families Heesch
€ 1.500,00
05 - 06
Vivado Designing with the UltraScale and UltraScale+ Architectures Heesch
€ 1.500,00
07 - 08
Embedded Advanced Features and Techniques of Embedded Systems Design Heesch
€ 1.500,00
09
Embedded Advanced Features and Techniques of Embedded Systems Software Design Heesch
€ 750,00
12 - 16
Doulos ARM Cortex-A53/A57 Software Design (Online) Online
€ 2.395,00
19 - 20
Embedded Zynq All Programmable SoC System Architecture Heesch
€ 1.500,00
19 - 23
Doulos Developing With Embedded Linux (Online) Online
€ 2.095,00
21
Embedded SDSoC Development Environment and Methodology Heesch
€ 750,00
22 - 23
Embedded Advanced SDSoC Development Environment and Methodology Heesch
€ 1.500,00
26 - 02
Doulos Expert VHDL Heesch
€ 3.795,00
26 - 27
Doulos Expert VHDL Design Heesch
€ 1.945,00
28 - 02
Doulos Expert VHDL Verification Heesch
€ 2.595,00

maart - 2018

Datum Categorie Training Locatie Prijs
05 - 06
DSP C-based Design: High-Level Synthesis with the Vivado HLx Tool Heesch
€ 1.500,00
07 - 09
Connectivity Designing with Multi-Gigabit Serial I/O Heesch
€ 2.250,00
12 - 13
Digital Design Essential Digital Design Techniques Heesch
€ 1.695,00
12 - 13
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 1.500,00
14 - 15
DSP DSP Design Using System Generator Heesch
€ 1.500,00
19 - 20
Embedded Embedded Systems Design Heesch
€ 1.500,00
21 - 22
Embedded Embedded Systems Software Design Heesch
€ 1.500,00
26 - 27
Vivado Designing FPGAs Using the Vivado Design Suite 1 Heesch
€ 1.500,00
26 - 27
Vivado Vivado Design Suite for ISE Software Project Navigator Users Heesch
€ 1.500,00
28 - 29
Vivado Designing FPGAs Using the Vivado Design Suite 2 Heesch
€ 1.500,00
28 - 29
Vivado Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users Heesch
€ 1.500,00

april - 2018

Datum Categorie Training Locatie Prijs
03 - 04
Vivado Designing FPGAs Using the Vivado Design Suite 3 Heesch
€ 1.500,00
03 - 04
Vivado Xilinx Partial Reconfiguration Tools & Techniques Heesch
€ 1.500,00
05 - 06
Vivado Designing FPGAs Using the Vivado Design Suite 4 Heesch
€ 1.500,00
05 - 06
Vivado UltraFast Design Methodology Heesch
€ 1.500,00
09 - 13
Doulos Comprehensive VHDL Heesch
€ 3.595,00
09 - 11
Doulos VHDL for Designers Heesch
€ 2.495,00
12 - 13
Doulos Advanced VHDL Heesch
€ 1.795,00
16 - 17
Embedded Advanced Features and Techniques of Embedded Systems Design Heesch
€ 1.500,00
18
Embedded Advanced Features and Techniques of Embedded Systems Software Design Heesch
€ 750,00
19 - 20
DSP C-based Design: High-Level Synthesis with the Vivado HLx Tool Heesch
€ 1.500,00
23 - 24
Vivado Designing with the 7 Series Families Heesch
€ 1.500,00
23 - 24
Vivado Designing with the UltraScale and UltraScale+ Architectures Heesch
€ 1.500,00
23 - 27
Doulos Designing Embedded Systems with Yocto (Online) Online
€ 1.900,00
25 - 26
Digital Design Essential Digital Design Techniques Heesch
€ 1.695,00
30 - 01
Embedded Zynq All Programmable SoC System Architecture Heesch
€ 1.500,00

mei - 2018

Datum Categorie Training Locatie Prijs
02
Embedded SDSoC Development Environment and Methodology Heesch
€ 750,00
03 - 04
Embedded Advanced SDSoC Development Environment and Methodology Heesch
€ 1.500,00
15 - 16
Embedded Zynq UltraScale+ MPSoC for the System Architect Heesch
€ 1.500,00
17
Embedded Zynq UltraScale+ MPSoC for the Hardware Designer Heesch
€ 750,00
22 - 23
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 1.500,00
24 - 25
DSP DSP Design Using System Generator Heesch
€ 1.500,00

juni - 2018

Datum Categorie Training Locatie Prijs
04 - 08
Doulos ARM Cortex-A53/A57 Software Design (Online) Online
€ 2.395,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
ISE Essentials of FPGA Design Heesch
€ 1.500,00
-
ISE Designing for Performance Heesch
€ 1.500,00
-
ISE Advanced FPGA Implementation Heesch
€ 1.500,00
-
ISE Essential Design with the PlanAhead Analysis and Design Tool Heesch
€ 750,00
-
ISE Advanced Design with the PlanAhead Analysis and Design Tool Heesch
€ 1.500,00
-
ISE Designing with the Virtex-5 FPGA Family Heesch
€ 750,00
-
ISE Designing with the Spartan-6 FPGA Families Heesch
€ 1.500,00
-
ISE Designing with the Virtex-6 Families Heesch
€ 1.500,00
-
ISE Designing with the Spartan-6 and Virtex-6 FPGA Families Heesch
€ 2.250,00
-
ISE FPGA Design Techniques for Lower Cost Heesch
€ 750,00
-
ISE Designing with Verilog Heesch
€ 2.250,00
-
ISE Debugging Techniques using the ChipScope Pro Tools Heesch
€ 1.500,00
-
Vivado Essential Tcl Scripting for the Vivado Design Suite Heesch
€ 750,00
-
Connectivity How to Design a High-Speed Memory Interface Heesch
€ 1.500,00
-
Embedded C Language Programming with SDK Heesch
€ 1.500,00