Trainingsschema - Core|Vision

Core|Vision biedt FPGA trainingen, zoals aangegeven in het trainingsschema hieronder. Staat uw gewenste training er niet bij of past de datum niet in uw agenda? Neem dan contact op met Core|Vision om te bespreken hoe we dit kunnen aanpassen aan uw behoeften.

juni - 2019

Datum	Categorie	Training	Locatie	Prijs
05 - 06	DSP	C-based Design: High-Level Synthesis with the Vivado HLx Tool	Heesch	€ 1.500,00
10 - 14	Doulos	Developing with ARM Cortex-M (Online)	Online	€ 2.495,00
17 - 20	Doulos	Essential Tcl (Online)	Online	€ 1.795,00
17 - 20	Doulos	Essential Tcl for Vivado (Online)	Online	€ 1.795,00
20 - 21	Connectivity	Designing with UltraScale FPGA Transceivers	Heesch	€ 1.500,00
27 - 28	Connectivity	Designing with Xilinx Serial Transceivers	Heesch	€ 1.500,00

juli - 2019

Datum	Categorie	Training	Locatie	Prijs
02 - 04	Connectivity	Designing with Multi-Gigabit Serial I/O	Heesch	€ 2.250,00
09 - 12	Doulos	Zynq System Architecture (Online)	Online	€ 1.795,00
11 - 12	Embedded	Embedded Systems Design	Heesch	€ 1.500,00
15 - 18	Doulos	Vivado HLS (Online)	Online	€ 1.795,00
18 - 19	Embedded	Embedded Systems Software Design	Heesch	€ 1.500,00
25 - 26	Embedded	Zynq All Programmable SoC System Architecture	Heesch	€ 1.500,00
29 - 02	Doulos	Comprehensive VHDL	Heesch	€ 3.795,00
29 - 31	Doulos	VHDL for Designers	Heesch	€ 2.695,00

augustus - 2019

Datum	Categorie	Training	Locatie	Prijs
01 - 02	Doulos	Advanced VHDL	Heesch	€ 1.795,00
05 - 06	FPGA	Designing FPGAs Using the Vivado Design Suite 1	Heesch	€ 1.500,00
05 - 06	FPGA	Designing with the UltraScale and UltraScale+ Architectures	Heesch	€ 1.500,00
07 - 08	FPGA	Designing FPGAs Using the Vivado Design Suite 2	Heesch	€ 1.500,00
07 - 08	Vivado	UltraFast Design Methodology	Heesch	€ 1.500,00
27 - 28	FPGA	Designing FPGAs Using the Vivado Design Suite 3	Heesch	€ 1.500,00
27 - 28	Digital Design	Essential Digital Design Techniques	Heesch	€ 1.795,00
29 - 30	FPGA	Designing FPGAs Using the Vivado Design Suite 4	Heesch	€ 1.500,00
29 - 30	FPGA	Xilinx Partial Reconfiguration Tools & Techniques	Heesch	€ 1.500,00

september - 2019

Datum	Categorie	Training	Locatie	Prijs
02 - 03	DSP	C-based Design: High-Level Synthesis with the Vivado HLx Tool	Heesch	€ 1.500,00
04	Embedded	SDSoC Development Environment and Methodology	Heesch	€ 750,00
05 - 06	Embedded	Advanced SDSoC Development Environment and Methodology	Heesch	€ 1.500,00
09 - 13	Doulos	Expert VHDL	Heesch	€ 3.895,00
09 - 10	Doulos	Expert VHDL Design	Heesch	€ 1.945,00
11 - 13	Doulos	Expert VHDL Verification	Heesch	€ 2.695,00
17 - 18	DSP	Essential DSP Implementation Techniques for Xilinx FPGAs	Heesch	€ 1.500,00
19 - 20	DSP	DSP Design Using System Generator	Heesch	€ 1.500,00

Op Aanvraag

Datum	Categorie	Training	Locatie	Prijs
-	ISE	Essentials of FPGA Design	Heesch	€ 1.500,00
-	ISE	Designing for Performance	Heesch	€ 1.500,00
-	ISE	Advanced FPGA Implementation	Heesch	€ 1.500,00
-	ISE	Essential Design with the PlanAhead Analysis and Design Tool	Heesch	€ 750,00
-	ISE	Advanced Design with the PlanAhead Analysis and Design Tool	Heesch	€ 1.500,00
-	ISE	Designing with the Virtex-5 FPGA Family	Heesch	€ 750,00
-	ISE	Designing with the Spartan-6 FPGA Families	Heesch	€ 1.500,00
-	ISE	Designing with the Virtex-6 Families	Heesch	€ 1.500,00
-	ISE	Designing with the Spartan-6 and Virtex-6 FPGA Families	Heesch	€ 2.250,00
-	FPGA	Designing with the 7 Series Families	Heesch	€ 1.500,00
-	ISE	FPGA Design Techniques for Lower Cost	Heesch	€ 750,00
-	ISE	Designing with Verilog	Heesch	€ 2.250,00
-	ISE	Debugging Techniques using the ChipScope Pro Tools	Heesch	€ 1.500,00
-	Vivado	Essential Tcl Scripting for the Vivado Design Suite	Heesch	€ 750,00
-	Vivado	Designing with the 7 Series Families	Heesch	€ 1.500,00
-	Vivado	Vivado Design Suite for ISE Software Project Navigator Users	Heesch	€ 1.500,00
-	Vivado	Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users	Heesch	€ 1.500,00