Core|Vision biedt FPGA trainingen, zoals aangegeven in het trainingsschema hieronder. Staat uw gewenste training er niet bij of past de datum niet in uw agenda? Neem dan contact op met Core|Vision om te bespreken hoe we dit kunnen aanpassen aan uw behoeften.

GAAT DOOR

december - 2021

Datum Categorie Training Locatie Prijs
10
Embedded Migrating to the Vitis Embedded Software Development IDE Workshop Heesch
€ 825,00
21
ACAP Online Workshop: Getting started with Xilinx Versal ACAP devices ✅ Webinar
€ 0,00

januari - 2022

Datum Categorie Training Locatie Prijs
10 - 11
DSP High-Level Synthesis with the Vitis HLS Tool ✅ Heesch
€ 2.000,00
12
vSync Circuits Designing a safe hand-shake synchronizer ✅ Webinar
€ 0,00
13 - 14
Embedded Designing with Dynamic Function eXchange (DFX) Using the Vivado Design Suite Heesch
€ 2.000,00
17 - 18
FPGA Designing FPGAs Using the Vivado Design Suite 1 Heesch
€ 2.000,00
17 - 18
Embedded Embedded Systems Design Heesch
€ 2.000,00
19
vSync Circuits RTL development under VHDL coding style requirements ✅ Webinar
€ 0,00
20 - 21
FPGA Designing FPGAs Using the Vivado Design Suite 2 Heesch
€ 2.000,00
20 - 21
Embedded Embedded Systems Software Design Heesch
€ 2.000,00
24 - 28
Doulos Comprehensive VHDL Heesch
€ 3.995,00
24 - 26
Doulos VHDL for Designers Heesch
€ 2.795,00
27 - 28
Doulos Advanced VHDL Heesch
€ 1.950,00
31 - 01
FPGA Designing FPGAs Using the Vivado Design Suite 3 Heesch
€ 2.000,00
31 - 01
Embedded Zynq UltraScale+ MPSoC for the System Architect Heesch
€ 2.000,00

februari - 2022

Datum Categorie Training Locatie Prijs
02 - 03
FPGA Designing FPGAs Using the Vivado Design Suite 4 Heesch
€ 2.000,00
02 - 03
Embedded Zynq UltraScale+ MPSoC for the Hardware Designer Heesch
€ 2.000,00
04
Embedded Migrating to the Vitis Embedded Software Development IDE Workshop Heesch
€ 1.000,00
07 - 09
ACAP Designing with the Versal ACAP: Architecture and Methodology Heesch
€ 3.000,00
07 - 08
Embedded Zynq All Programmable SoC System Architecture Heesch
€ 2.000,00
09 - 10
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 2.000,00
10
ACAP Designing with the Versal ACAP: Network on Chip Heesch
€ 1.000,00
14 - 15
FPGA Designing with the UltraScale and UltraScale+ Architectures Heesch
€ 2.000,00
14 - 15
DSP DSP Design Using System Generator Heesch
€ 2.000,00
14 - 15
Doulos Essential Tcl Heesch
€ 1.950,00
16 - 17
Digital Design Essential Digital Design Techniques Heesch
€ 1.995,00
16 - 17
FPGA UltraFast Design Methodology Heesch
€ 2.000,00
21 - 22
ACAP Designing with Versal AI Engine 1: Architecture and Design Flow Heesch
€ 2.000,00
21 - 22
AI Developing AI Inference Solutions with the Vitis AI Platform Heesch
€ 2.000,00
23 - 25
ACAP Accelerating Applications with the Vitis Unified Software Environment Heesch
€ 3.000,00
23 - 24
ACAP Designing with Versal AI Engine 2: Graph Programming with AI Engine Kernels Heesch
€ 2.000,00
28 - 04
Doulos Expert VHDL Heesch
€ 4.150,00
28 - 01
Doulos Expert VHDL Design Heesch
€ 1.995,00

maart - 2022

Datum Categorie Training Locatie Prijs
02 - 04
Doulos Expert VHDL Verification Heesch
€ 2.895,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
FPGA Xilinx Partial Reconfiguration Tools & Techniques Online or Heesch
€ 2.500,00
-
FPGA Designing with the UltraScale and UltraScale+ Architectures Online or Heesch
€ 2.000,00
-
FPGA UltraFast Design Methodology Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 1 Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 2 Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 3 Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 4 Online or Heesch
€ 2.000,00
-
Online Vivado Design Suite for ISE Software Project Navigator Users Online or Heesch
€ 2.000,00
-
Online Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users Online or Heesch
€ 2.000,00
-
FPGA Designing with the 7 Series Families Online or Heesch
€ 2.000,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Online or Heesch
€ 2.000,00
-
DSP DSP Design Using System Generator Online or Heesch
€ 2.000,00
-
DSP High-Level Synthesis with the Vitis HLS Tool Online or Heesch
€ 2.000,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
Embedded Embedded Systems Design Online or Heesch
€ 2.000,00
-
Embedded Embedded Systems Software Design Online or Heesch
€ 2.000,00
-
Embedded Advanced Features and Techniques of Embedded Systems Design Online or Heesch
€ 2.500,00
-
Embedded Advanced Features and Techniques of Embedded Systems Software Design Online or Heesch
€ 1.250,00
-
Embedded Zynq All Programmable SoC System Architecture Online or Heesch
€ 2.000,00
-
Embedded Zynq UltraScale+ MPSoC for the System Architect Online or Heesch
€ 2.000,00
-
Embedded Zynq UltraScale+ MPSoC for the Hardware Designer Online or Heesch
€ 2.000,00
-
Embedded SDSoC Development Environment and Methodology Online or Heesch
€ 1.250,00
-
Embedded Advanced SDSoC Development Environment and Methodology Online or Heesch
€ 2.500,00
-
Embedded Migrating to the Vitis Embedded Software Development IDE Workshop Online or Heesch
€ 1.000,00
-
Embedded Accelerating Applications with the Vitis Unified Software Environment Online or Heesch
€ 2.000,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
Connectivity Designing with Multi-Gigabit Serial I/O Online or Heesch
€ 3.750,00
-
Connectivity Designing with Xilinx Serial Transceivers Online or Heesch
€ 2.000,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
ISE Essentials of FPGA Design Heesch
€ 2.500,00
-
ISE Designing for Performance Heesch
€ 2.500,00
-
ISE Advanced FPGA Implementation Heesch
€ 2.500,00
-
ISE Essential Design with the PlanAhead Analysis and Design Tool Heesch
€ 1.250,00
-
ISE Advanced Design with the PlanAhead Analysis and Design Tool Heesch
€ 2.500,00
-
ISE FPGA Design Techniques for Lower Cost Heesch
€ 1.250,00
-
ISE Designing with Verilog Heesch
€ 3.750,00
-
ISE Debugging Techniques using the ChipScope Pro Tools Heesch
€ 2.500,00
-
ISE Designing with the Virtex-5 FPGA Family Heesch
€ 1.250,00
-
ISE Designing with the Virtex-6 Families Heesch
€ 2.500,00
-
ISE Designing with the Spartan-6 and Virtex-6 FPGA Families Heesch
€ 3.750,00
-
ISE Designing with the Spartan-6 FPGA Families Heesch
€ 2.500,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
Doulos Expert VHDL Online or Heesch
€ 4.150,00
-
Doulos Expert VHDL Design Online or Heesch
€ 1.995,00
-
Doulos Expert VHDL Verification Online or Heesch
€ 2.895,00
-
Doulos Comprehensive VHDL Online or Heesch
€ 3.995,00
-
Doulos VHDL for Designers Online or Heesch
€ 2.795,00
-
Doulos Advanced VHDL Online or Heesch
€ 1.950,00
-
Digital Design Essential Digital Design Techniques Online or Heesch
€ 1.995,00
-
Doulos Essential Tcl Online or Heesch
€ 1.950,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
vSync Circuits Solving Clock Domain Crossover Conflicts Heesch
€ 1.795,00
-
vSync Circuits Solving Clock Domain Crossover Conflicts including 1 month evaluation license Heesch
€ 4.995,00
-
vSync Circuits Solving Clock Domain Crossover Conflicts including 1 year full license CDC Heesch
€ 37.500,00

Op Aanvraag

Datum Categorie Training Locatie Prijs
-
AI Developing AI Inference Solutions with the Vitis AI Platform Online or Heesch
€ 2.000,00
-
ACAP Accelerating Applications with the Vitis Unified Software Environment Online or Heesch
€ 3.000,00
-
ACAP Designing with Versal AI Engine 1: Architecture and Design Flow Online or Heesch
€ 2.000,00
-
ACAP Designing with Versal AI Engine 2: Graph Programming with AI Engine Kernels Online or Heesch
€ 2.000,00
-
ACAP Designing with the Versal ACAP: Architecture and Methodology Online or Heesch
€ 3.000,00
-
ACAP Designing with the Versal ACAP: Network on Chip Online or Heesch
€ 1.000,00