Course uses Vitis Unified Software Platform
Aankomende Evenementen
- Designing with the Versal ACAP: Network on Chip - 03/02/2023 - 09:00 - 17:00
- Zynq UltraScale+ MPSoC for the System Architect - 06/02/2023 - 07/02/2023 - 09:00 - 17:00
- Zynq UltraScale+ MPSoC for the Hardware Designer - 08/02/2023 - 09/02/2023 - 09:00 - 17:00
- Migrating to the Vitis Embedded Software Development IDE Workshop - 10/02/2023 - 09:00 - 17:00
- Developing AI Inference Solutions with the Vitis AI Platform - 16/02/2023 - 17/02/2023 - 09:00 - 17:00
- High-Level Synthesis with the Vitis HLS Tool - 20/02/2023 - 21/02/2023 - 09:00 - 17:00
- Designing with Versal AI Engine: Architecture and Design Flow (1) - 07/03/2023 - 08/03/2023 - 09:00 - 17:00
- Designing with Versal AI Engine: Graph Programming with AI Engine Kernels (2) - 09/03/2023 - 10/03/2023 - 09:00 - 17:00
- Designing with Dynamic Function eXchange (DFX) Using the Vivado Design Suite - 20/03/2023 - 21/03/2023 - 09:00 - 17:00
- Accelerating Applications with the Vitis Unified Software Environment - 27/03/2023 - 29/03/2023 - 09:00 - 17:00
- Zynq UltraScale+ MPSoC for the Hardware Designer - 25/04/2023 - 26/04/2023 - 09:00 - 17:00
- Embedded Systems Design - 01/05/2023 - 02/05/2023 - 09:00 - 17:00
- Embedded Systems Software Design - 03/05/2023 - 05/05/2023 - 09:00 - 17:00
- High-Level Synthesis with the Vitis HLS Tool - 08/05/2023 - 09/05/2023 - 09:00 - 17:00
- Zynq UltraScale+ MPSoC for the Hardware Designer - 10/05/2023 - 11/05/2023 - 09:00 - 17:00
- Designing with the Versal ACAP: Architecture and Methodology - 12/06/2023 - 14/06/2023 - 09:00 - 17:00
- Designing with the Versal ACAP: Network on Chip - 15/06/2023 - 09:00 - 17:00
- Designing with Versal AI Engine: Architecture and Design Flow (1) - 15/06/2023 - 16/06/2023 - 09:00 - 17:00
- Designing with Versal AI Engine: Graph Programming with AI Engine Kernels (2) - 19/06/2023 - 20/06/2023 - 09:00 - 17:00
- Accelerating Applications with the Vitis Unified Software Environment - 21/06/2023 - 23/06/2023 - 09:00 - 17:00