Core|Vision biedt FPGA trainingen, zoals aangegeven in het trainingsschema hieronder. Staat uw gewenste training er niet bij of past de datum niet in uw agenda? Neem dan contact op met Core|Vision om te bespreken hoe we dit kunnen aanpassen aan uw behoeften.

GAAT DOOR

October - 2023

Date Category Training Location Price
05 - 06
Connectivity Designing with Xilinx Serial Transceivers Heesch
-
09 - 10
Doulos Expert VHDL Design ✅ Heesch
-
09 - 13
Doulos Expert VHDL ✅ Heesch
-
11 - 13
Doulos Expert VHDL Verification ✅ Heesch
-
13
Doulos Getting Started with SystemVerilog Randomization ✅ Webinar
16 - 17
Doulos Essential Tcl Heesch
-
17 - 18
Digital Design Essential Digital Design Techniques Heesch
€ 2.100,00
18 - 19
Embedded Designing with Dynamic Function eXchange (DFX) Using the Vivado Design Suite Heesch
-
18 - 19
FPGA Designing with the UltraScale and UltraScale+ Architectures Heesch
-
18 - 19
FPGA UltraFast Design Methodology Heesch
-
23 - 27
Doulos Comprehensive VHDL ✅ Heesch
€ 4.225,00
23 - 25
Doulos VHDL for Designers ✅ Heesch
€ 3.075,00
26 - 27
Doulos Advanced VHDL ✅ Heesch
€ 2.100,00

November - 2023

Date Category Training Location Price
03
ACAP Designing with the IP Integrator Tool Heesch
€ 1.000,00
03
Embedded Migrating to the Vitis Embedded Software Development IDE Workshop Heesch
€ 1.000,00
03
Embedded Migrating to the Vitis Embedded Software Development IDE Workshop Heesch
€ 1.000,00
06 - 07
FPGA Designing FPGAs Using the Vivado Design Suite 1 Heesch
€ 2.000,00
06 - 07
FPGA Designing FPGAs Using the Vivado Design Suite 3 Heesch
€ 2.000,00
08 - 09
FPGA Designing FPGAs Using the Vivado Design Suite 2 Heesch
€ 2.000,00
08 - 09
FPGA Designing FPGAs Using the Vivado Design Suite 4 Heesch
€ 2.000,00
14 - 15
ACAP Adaptive SoCs for System Architects Heesch
€ 2.000,00
14 - 15
DSP High-Level Synthesis with the Vitis HLS Tool Heesch
€ 2.000,00
16 - 17
ACAP Design Closure Techniques Heesch
€ 2.000,00
16 - 17
ACAP Zynq UltraScale+ MPSoC: Boot and Platform Management Heesch
€ 2.000,00
20 - 21
Embedded Embedded Systems Design Heesch
€ 2.000,00
22 - 24
Embedded Embedded Systems Software Design Heesch
€ 3.000,00
27 - 28
Embedded Zynq UltraScale+ MPSoC for the Hardware Designer Heesch
€ 2.000,00
29 - 30
ACAP Designing with Versal AI Engines: Quick Start ONLINE WORKSHOP ✅ Online

December - 2023

Date Category Training Location Price
05 - 06
ACAP Designing with the Versal ACAP: Architecture and Methodology Heesch
€ 2.000,00
05 - 06
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 2.000,00
07 - 08
DSP Vitis Model Composer: A MATLAB and Simulink-based Product Heesch
€ 2.000,00
08
ACAP Designing with the Versal ACAP: Network on Chip Heesch
€ 1.000,00
11 - 12
AI Developing AI Inference Solutions with the Vitis AI Platform Heesch
€ 2.000,00
13 - 15
ACAP Accelerating Applications with the Vitis Unified Software Environment Heesch
€ 3.000,00
18 - 19
ACAP Designing with Versal AI Engine: Architecture and Design Flow (1) Heesch
€ 2.000,00
20 - 21
ACAP Designing with Versal AI Engine: Graph Programming with AI Engine Kernels (2) Heesch
€ 2.000,00

January - 2050

Date Category Training Location Price
-
ISE Designing for Performance Heesch
€ 2.500,00
-
ISE Advanced FPGA Implementation Heesch
€ 2.500,00
-
FPGA Xilinx Partial Reconfiguration Tools & Techniques Online or Heesch
€ 2.500,00
-
FPGA Designing with the UltraScale and UltraScale+ Architectures Online or Heesch
€ 2.000,00
-
FPGA UltraFast Design Methodology Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 1 Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 2 Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 3 Online or Heesch
€ 2.000,00
-
FPGA Designing FPGAs Using the Vivado Design Suite 4 Online or Heesch
€ 2.000,00
-
Online Vivado Design Suite for ISE Software Project Navigator Users Online or Heesch
€ 2.000,00
-
Online Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users Online or Heesch
€ 2.000,00
-
ISE Essential Design with the PlanAhead Analysis and Design Tool Heesch
€ 1.250,00
-
FPGA Designing with the 7 Series Families Online or Heesch
€ 2.000,00
-
Embedded Designing with Dynamic Function eXchange (DFX) Using the Vivado Design Suite Online or Heesch
€ 2.000,00
-
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Online or Heesch
€ 2.000,00
-
DSP DSP Design Using System Generator Online or Heesch
€ 2.000,00
-
DSP High-Level Synthesis with the Vitis HLS Tool Online or Heesch
€ 2.000,00
-
Embedded Embedded Systems Design Online or Heesch
€ 2.000,00
-
Embedded Embedded Systems Software Design Online or Heesch
€ 2.000,00
-
Embedded Zynq All Programmable SoC System Architecture Online or Heesch
€ 2.000,00
-
Embedded Zynq UltraScale+ MPSoC for the System Architect Online or Heesch
€ 2.000,00
10
Zynq UltraScale+ MPSoC for the System Architect Heesch
€ 2.000,00
-
Embedded Zynq UltraScale+ MPSoC for the Hardware Designer Online or Heesch
€ 2.000,00
-
Embedded SDSoC Development Environment and Methodology Online or Heesch
€ 1.250,00
-
Embedded Migrating to the Vitis Embedded Software Development IDE Workshop Online or Heesch
€ 1.000,00
-
Embedded Accelerating Applications with the Vitis Unified Software Environment Online or Heesch
€ 3.000,00
-
ACAP Designing with Versal AI Engine 1: Architecture and Design Flow Online or Heesch
€ 2.000,00
-
ACAP Designing with Versal AI Engine 2: Graph Programming with AI Engine Kernels Online or Heesch
€ 2.000,00
-
ACAP Designing with the Versal ACAP: Architecture and Methodology Online or Heesch
€ 3.000,00
-
ACAP Designing with the Versal ACAP: Network on Chip Online or Heesch
€ 1.000,00
-
AI Developing AI Inference Solutions with the Vitis AI Platform Online or Heesch
€ 2.000,00
-
AI Using Vision-based Applications with the Kria KV260 Vision AI Starter Kit & System-on-Module Online or Heesch
€ 1.000,00
-
Connectivity Designing with Multi-Gigabit Serial I/O Online or Heesch
€ 3.750,00
-
Connectivity Designing with Xilinx Serial Transceivers Online or Heesch
€ 2.000,00
-
ISE FPGA Design Techniques for Lower Cost Heesch
€ 1.250,00
-
Doulos Comprehensive VHDL Online or Heesch
€ 4.225,00
-
Doulos VHDL for Designers Online or Heesch
€ 3.075,00
-
Doulos Advanced VHDL Online or Heesch
€ 2.100,00
-
Doulos Expert VHDL Online or Heesch
€ 4.350,00
-
Doulos Expert VHDL Design Online or Heesch
€ 2.250,00
-
Doulos Expert VHDL Verification Online or Heesch
€ 3.125,00
-
Digital Design Essential Digital Design Techniques Online or Heesch
€ 2.100,00
-
Doulos Essential Tcl Online or Heesch
€ 2.100,00
-
vSync Circuits Solving Clock Domain Crossover Conflicts Heesch
€ 2.000,00
-
ISE Designing with the Virtex-6 Families Heesch
€ 2.500,00
-
ISE Designing with the Spartan-6 and Virtex-6 FPGA Families Heesch
€ 3.750,00
-
ISE Designing with the Spartan-6 FPGA Families Heesch
€ 2.500,00