Core | Vision offers FPGA courses, as shown in training schedule below. In case your desired training is not listed, or the date does not fit into your schedule, please contact Core|Vision to discuss how we can adapt it to your needs.

September - 2019

Date Category Training Location Price
17 - 18
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 1.500,00
19 - 20
DSP DSP Design Using System Generator Heesch
€ 1.500,00
23 - 24
Embedded Advanced Features and Techniques of Embedded Systems Design Heesch
€ 1.500,00
23 - 27
Doulos ARM Cortex-A53/A57 Software Design (Online) Online
€ 2.495,00
25
Embedded Advanced Features and Techniques of Embedded Systems Software Design Heesch
€ 750,00
30 - 02
Connectivity Designing with Multi-Gigabit Serial I/O Heesch
€ 2.250,00
30 - 03
Doulos Essential Tcl (Online) Online
€ 1.795,00
30 - 03
Doulos Essential Tcl for Vivado (Online) Online
€ 1.795,00
30 - 03
Doulos Vivado HLS (Online) Online
€ 1.795,00

October - 2019

Date Category Training Location Price
03 - 04
Connectivity Designing with UltraScale FPGA Transceivers Heesch
€ 1.500,00
03 - 04
Connectivity Designing with Xilinx Serial Transceivers Heesch
€ 1.500,00
10 - 11
Embedded Embedded Systems Design Heesch
€ 1.500,00
14 - 15
Embedded Embedded Systems Software Design Heesch
€ 1.500,00
14 - 17
Doulos Zynq System Architecture (Online) Online
€ 1.795,00
16 - 17
Embedded Zynq UltraScale+ MPSoC for the System Architect Heesch
€ 1.500,00
18
Embedded Zynq UltraScale+ MPSoC for the Hardware Designer Heesch
€ 750,00
29 - 30
FPGA Designing FPGAs Using the Vivado Design Suite 1 Heesch
€ 1.500,00
29 - 30
FPGA Designing with the UltraScale and UltraScale+ Architectures Heesch
€ 1.500,00
31 - 01
FPGA Designing FPGAs Using the Vivado Design Suite 2 Heesch
€ 1.500,00
31 - 01
Vivado UltraFast Design Methodology Heesch
€ 1.500,00

November - 2019

Date Category Training Location Price
11 - 15
Doulos Developing With Embedded Linux (Online) Online
€ 2.195,00
14 - 15
Embedded Zynq All Programmable SoC System Architecture Heesch
€ 1.500,00
18 - 21
Connectivity Designing an Integrated PCI Express System (Online) Online
€ 1.795,00
19 - 20
FPGA Designing FPGAs Using the Vivado Design Suite 3 Heesch
€ 1.500,00
21 - 22
FPGA Designing FPGAs Using the Vivado Design Suite 4 Heesch
€ 1.500,00
21 - 22
FPGA Xilinx Partial Reconfiguration Tools & Techniques Heesch
€ 1.500,00
25 - 29
Doulos Designing Embedded Systems with Yocto (Online) Online
€ 2.195,00

December - 2019

Date Category Training Location Price
02 - 03
DSP C-based Design: High-Level Synthesis with the Vivado HLx Tool Heesch
€ 1.500,00
04
Embedded SDSoC Development Environment and Methodology Heesch
€ 750,00
05 - 06
Embedded Advanced SDSoC Development Environment and Methodology Heesch
€ 1.500,00
09 - 10
DSP DSP Design Using System Generator Heesch
€ 1.500,00
12 - 13
Digital Design Essential Digital Design Techniques Heesch
€ 1.795,00
16 - 20
Doulos Comprehensive VHDL Heesch
€ 3.795,00
16 - 18
Doulos VHDL for Designers Heesch
€ 2.695,00
16 - 20
Doulos Developing with ARM Cortex-M (Online) Online
€ 2.495,00
19 - 20
Doulos Advanced VHDL Heesch
€ 1.795,00

January - 2020

Date Category Training Location Price
09
DSP Essential DSP Implementation Techniques for Xilinx FPGAs Heesch
€ 1.500,00
13 - 17
Doulos Expert VHDL Heesch
€ 3.895,00
13 - 14
Doulos Expert VHDL Design Heesch
€ 1.945,00
15 - 17
Doulos Expert VHDL Verification Heesch
€ 2.695,00

On Request

Date Category Training Location Price
-
ISE Essentials of FPGA Design Heesch
€ 1.500,00
-
ISE Designing for Performance Heesch
€ 1.500,00
-
ISE Advanced FPGA Implementation Heesch
€ 1.500,00
-
ISE Essential Design with the PlanAhead Analysis and Design Tool Heesch
€ 750,00
-
ISE Advanced Design with the PlanAhead Analysis and Design Tool Heesch
€ 1.500,00
-
ISE Designing with the Virtex-5 FPGA Family Heesch
€ 750,00
-
ISE Designing with the Spartan-6 FPGA Families Heesch
€ 1.500,00
-
ISE Designing with the Virtex-6 Families Heesch
€ 1.500,00
-
ISE Designing with the Spartan-6 and Virtex-6 FPGA Families Heesch
€ 2.250,00
-
ISE FPGA Design Techniques for Lower Cost Heesch
€ 750,00
-
ISE Designing with Verilog Heesch
€ 2.250,00
-
ISE Debugging Techniques using the ChipScope Pro Tools Heesch
€ 1.500,00
-
Vivado Essential Tcl Scripting for the Vivado Design Suite Heesch
€ 750,00
-
Vivado Designing with the 7 Series Families Heesch
€ 1.500,00
-
Vivado Vivado Design Suite for ISE Software Project Navigator Users Heesch
€ 1.500,00
-
Vivado Vivado Design Suite Advanced XDC and Static Timing Analysis for ISE Software Users Heesch
€ 1.500,00
-
vSync Circuits Solving Clock Domain Crossover Conflicts Heesch
€ 1.795,00
-
vSync Circuits Solving Clock Domain Crossover Conflicts including 1 month evaluation license Heesch
€ 4.995,00
-
vSync Circuits Solving Clock Domain Crossover Conflicts including 1 year license for 5 CDC Heesch
€ 12.875,00
-
vSync Circuits Solving Clock Domain Crossover Conflicts including 1 year full license CDC Heesch
€ 37.500,00