Zynq UltraScale+ MPSoC: Boot and Platform Management

Course Description

This course provides software developers responsible for booting and platform management with an overview of the capabilities and support for the Zynq® UltraScale+ MPSoC.
The emphasis is on:

  • Reviewing the catalog of OS implementation options, including hypervisors and various Linux implementations
  • Booting and configuring a system
  • Applying various power management techniques for the Zynq UltraScale+ MPSoC

 

Architecture overview MPSoC UltraScale+Level

Embedded System Architect 3

Training Duration

2 days

Audience

Software developers interested in understanding the boot process, including creating bootable images, FSBL topics, and the platform management unit (PMU).

Prerequisites

  • General understanding of C coding
  • Familiarity with issues related to booting a complex embedded system

Software Tools

  • Vivado® Design Suite 2022.2
  • Vitis unified software platform 2022.2
  • Hardware emulation environment:
    • VirtualBox
    • QEMU
    • Ubuntu desktop
    • PetaLinux

Hardware

  • Zynq UltraScale+ MPSoC ZCU104 board*

* This course focuses on the Zynq UltraScale+ MPSoC architecture. Check with your local Authorized Training Provider for the specifics of the inclass lab environment or other customizations.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Define the underlying implementation of the application processing unit (APU) and realtime processing unit (RPU) to make best use of their capabilities
  • Explore the capabilities of the platform management unit (PMU)
  • Create bootable images
  • Debug booting issues in the FSBL and PMU
  • Manage hardware/software codebugging

Course Outline

Day 1

  • Application Processing Unit
    Introduction to the members of the APU, specifically the CortexA53 processor and how the cluster is configured and managed. {Lecture}
  • RealTime Processing Unit
    Focuses on the realtime processing module (RPU) in the PS, which is comprised of a pair of Cortex processors and supporting elements. {Lecture, Demo, Lab}
  • Power Management
    Overview of the PMU and the powersaving features of the device. {Lecture, Lab}
  • Power Domains
    Investigate the granularity of the power control within the device. {Lecture}
  • QEMU
    Introduction to the Quick Emulator, which is the tool used to run software for a device when hardware is not available. {Lecture, Demo, Labs}
  • PMU
    Introduction to the concepts of power requirements in embedded systems and the Zynq UltraScale+ MPSoC. {Lectures, Lab}
    – Overview of the PMU and the power-saving features of the device. {Lecture, Demo, Lab}

Day 2

  • Booting
    How to implement the embedded system, including the boot process and boot image creation. Also how to detect a failed boot. {Lectures, Labs}
  • FSBL
    Demonstrates the process of developing, customizing, and debugging this mandatory piece of code. {Lectures, Lab, Demo}
  • Debugging Using CrossTriggering.
    Illustrates how HWSW crosstriggering techniques can uncover issues. {Lecture, Lab}

 

ACAP


Datum
11 september 2023 - 12 september 2023

Locatie
Core|Vision
Cereslaan 24
5384 VT
Heesch

Prijs
€ 0,00
of
20 Xilinx Training Credits

Informatie
Training brochure

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