Zero-effort FSM bugs handling

 

indicates CONFIRMED TO RUN

  • Date: Friday June 10, 2022
  • Duration: 30min (with live Q&A)
  • Time: 11:00 – 11:30(CET)
  • Presenter: Dr Reuven Dobkin
  • Attendance: FREE!

 

Webinar Overview

This webinar will focus on:

FSMs are commonly employed for implementation of control logic in digital designs. During this webinar we will review common bugs that may appear in a few popular approaches of FSM RTL implementation. We will show how these bugs can be automatically identified and reported, reducing significantly the verification effort.

 

If you have any queries, please contact info@vsyncc.com

vSync Circuits


Date
10 June 2022

Location
Webinar
Online

Webinar

Price
€ 0,00

Information
Training brochure

Registration form

Registration on demand, please contact us.