D&E 2018 Presentation “Multiple-clock Domain in FPGA Designs: Challenges & Solutions”

On 8 November 2018 the 20th edition of the Design Automation & Embedded Systems Event took place at Van der Valk Hotel in Eindhoven. During the annual Design Automation & Embedded Systems Event, Frank de Bont gave a presentation on Multiple-clock Domain in FPGA Designs: Challenges & Solutions

This presentation can be downloaded using the link below.

“Multiple-clock Domain in FPGA Designs: Challenges & Solutions”

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