Adaptive SoCs for System Architects

Adaptive SoCs for System Architects


09 september 2024 - 10 september 2024     
09:00 - 17:00


 / 20  Training Credits
On request


Cereslaan 24, 5384 VT, Heesch

Event type


Kaart niet beschikbaar

Course Description

This course provides system architects with an overview of the capabilities and support for the AMD Zynq™ UltraScale+™ MPSoC and Versal™ adaptive SoC devices.
The emphasis is on:

    • Utilizing power management strategies effectively
    • Leveraging the platform management unit (PMU) capabilities
    • Running the system securely and safely
    • Reviewing the high-level architecture of the devices
    • Identifying appropriate boot sequences

What's New for 2023.2

  • All labs have been updated to the latest software versions
  • All labs and demos have been migrated to the new Vitis Unified IDE


Embedded System Architect 3

Course Duration

2 days


System architects interested in understanding the capabilities and ecosystem of the Zynq UltraScale+ MPSoC and Versal adaptive SoC devices.


  • Suggested: Understanding of the Zynq 7000 SoC, Zynq UltraScale+ MPSoC, and/or Versal adaptive SoC architectures
  • Familiarity with embedded operating systems

Software Tools

  • Vivado™ Design Suite 2023.2MPSoC
  • Vitis™ Unified IDE 2023.2
  • Hardware emulation environment:
    • VirtualBox
    • QEMU
    • Ubuntu desktop
    • PetaLinux


  • Zynq UltraScale+ MPSoC ZCU104 board*
  • Zynq 7000 SoC ZC702 board*
  • Versal adaptive SoC VCK190 board*

* This course focuses on the Zynq UltraScale+ MPSoC, Zynq 7000 SoC, and Versal adaptive SoC architectures. Check with your local Authorized Training Provider for the specifics of the in-class lab environment or other customizations

Skills Gained

  • After completing this comprehensive training, you will have the necessary skills to:Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
  • Identify mechanisms to secure and safely run the system
  • Outline the high-level architecture of the devices
  • Define the boot sequences appropriate to system requirements

Course Outline

Day 1

  • Zynq UltraScale+ MPSoC Overview - Overview of the Zynq UltraScale+ MPSoC device. {Lecture, Demo, Lab}
  • QEMU - Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available. {Lectures, Demo, Labs}
  • Safety and Security - Defines what safety and security is in the context of embedded systems and introduces several standards. {Lectures, Demo}
  • Power Management - Overview of the PMU and the power-saving features of the device. {Lectures, Demo}

Day 2

  • System Coherency - Learn how information is synchronized within the API and through the ACE/AXI ports. {Lectures}
  • DDR and QoS - Understand how DDR can be configured to provide the best performance for your system. {Lectures, Demo, Lab}
  • Booting - How to implement the embedded system, including the boot process and boot image creation. {Lectures, Lab}
  • Zynq UltraScale+ MPSoC Ecosystem Support - Overview of supported operating systems, software stacks, hypervisors, etc. {Lecture}
  • Debugging Using Cross-Triggering - Illustrates how HW-SW cross-triggering techniques can uncover issues. {Lecture, Lab}





Registration information

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