• Date:  Wednesday May 04, 2022
• Duration: 1 hour
• Time: 11:00 – 12:00
• Presenter: David C Black
  
• Cost: Free!

Please note this webinar is a webcast and is only joinable by computer audio (VOIP).

Webinar Overview:

SystemC has become well-established as the language of choice for system modeling and virtual platform creation and integration, and is now being applied successfully for high level synthesis. SystemC models also frequently appear as reference models in the hardware verification flow.

This session is aimed at hands-on hardware or software engineers who might know Verilog or C but have no previous experience of SystemC. It will explain what you need to know to be successful with SystemC by exploring some fundamental questions including:

• What is SystemC and how is it used?
• What does modern SystemC code look like?
• What differentiates SystemC from SystemVerilog?
• What use cases best fit SystemC?
• What is TLM?
• Where can I learn more?

The session will be presented by David C Black, Doulos Senior Member of Technical Staff and co-author of “SystemC: From the Ground Up”. It will consist of a one-hour session, (see below for details) and will be interactive with Q&A participation from delegates.

Attendance is FREE!