How to accelerate both your FPGA application and productivity

✅ indicates CONFIRMED TO RUN

• Date: Friday November 18, 2022
• Duration: 1 hour (with live Q&A)
• Time: 11am – 12pm
• Presenter: L. Eric Culverson
• Cost: Free!

Webinar Overview:

By utilizing modern co-synthesis methodologies, system-level software can be made to run as customized hardware modules within an FPGA-based hardware kernel, running seamlessly with the rest of the application software on heterogeneous processors integrated utilizing the Xilinx Vitis™ Unified Software Development environment.

With the advent of heterogeneous compute platforms and the requirement for edge to cloud scalability, an easy-to-navigate, multi-capable design methodology is needed.

In this webinar:
We will show you a new Vitis-based design methodology that seamlessly utilizes various compilers and analysis tools to support both proprietary and industry-standard libraries/APIs, thereby offering a structured approach for all aspects of software development, debug and deployment for individual kernels and complete systems.

What you will learn:

• How to maximize productivity using a hierarchical SoC design approach
• The underlying compilers and analysis tools necessary for simple and complex designs
• Whether Linux or Windows-based tools are needed for your application

L. Eric Culverson – a Xilinx Authorized Instructor of Technically Speaking, Inc – will present this webinar, with interactive Q&A for attendees throughout.

Attendance is free of charge

If you have any queries, please contact webinars@doulos.com