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UID:687@core-vision.nl
DTSTART;TZID=Europe/Amsterdam:20251126T090000
DTEND;TZID=Europe/Amsterdam:20251127T170000
DTSTAMP:20250703T123819Z
URL:https://www.core-vision.nl/events/high-level-synthesis-with-the-vitis-
 unified-ide/
SUMMARY:High-Level Synthesis with the Vitis Unified IDE
DESCRIPTION:Course Description\nThis course provides a thorough introductio
 n to the Vitis™ High-Level Synthesis (HLS) tool. The focus is on:\n\n 	C
 onverting C/C++ designs into RTL implementations.\n 	Learning the Vitis HL
 S tool flow.\n 	Creating I/O interfaces for designs by using the Vitis HLS
  tool.\n 	Applying different optimization techniques.\n 	Improving through
 put\, area\, latency\, and logic by using different HLS pragmas/directives
 .\n 	Exporting IP that can be used with the Vivado® IP catalog.\n 	Migrat
 ing designs from the classic Vitis HLS tool to the Vitis Unified IDE.\n\n
ATTACH;FMTTYPE=image/jpeg:https://www.core-vision.nl/wp-content/uploads/20
 24/03/vitis_hls-e1718948972516.png
CATEGORIES:AI,AMD,DSP,FPGA,IP,KRIA,ML,MPSoC,Versal,Vitis,Vivado,Zynq
LOCATION:Core-Vision\, Cereslaan 24\, Heesch\, Netherlands\, 5384 VT\, Nede
 rland
X-APPLE-STRUCTURED-LOCATION;VALUE=URI;X-ADDRESS=Cereslaan 24\, Heesch\, Net
 herlands\, 5384 VT\, Nederland;X-APPLE-RADIUS=100;X-TITLE=Core-Vision:geo:
 0,0
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TZID:Europe/Amsterdam
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BEGIN:STANDARD
DTSTART:20251026T020000
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