Expert VHDL Design

Course Descriptionexpvhdl_learningpath

Expert VHDL Design is a 2 days class part of the intensive 5-day Expert VHDL class.

  • Expert VHDL Design (2 days) is for design engineers wishing to deepen their knowledge of RTL synthesis using VHDL, and to improve their VHDL coding style with design maintainability and re-use in mind. Design for Verification is also covered with an introduction to modern assertion-based techniques.

The modules, which may be attended together or independently, follow on from the industry standard class, Comprehensive VHDL. Carefully designed workshops comprise approximately 50% of teaching time, and enable engineers to apply their new skills in the context of the latest VHDL design tools, practices and methodologies.

Audience

  • Design engineers wishing to improve the efficiency of their hardware designs and increase productivity

Doulos


Datum
25 februari 2019 - 26 februari 2019

Locatie
Core|Vision
Cereslaan 10b
5384 VT
Heesch

Prijs
€ 1.945,00
of
30 Xilinx Training Credits

Informatie
Training brochure

Registratieformulier

Expert VHDL Design Doulos-24000

€ 1.945,00