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TZID:Europe/Amsterdam
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UID:1170@core-vision.nl
DTSTART;TZID=Europe/Amsterdam:20260415T090000
DTEND;TZID=Europe/Amsterdam:20260416T170000
DTSTAMP:20251211T080808Z
URL:https://www.core-vision.nl/events/embedded-heterogeneous-design-7/
SUMMARY:Embedded Heterogeneous Design
DESCRIPTION:Course Description\nThis course covers the AMD Versal™ archit
 ecture and illustrates the tool flow for developing HLS and AI Engine comp
 onents as well as integrating an entire system project to design an embedd
 ed heterogeneous system using the v++ tools and AMD Vitis™ Unified IDE.T
 he emphasis of this course is on:\n\n\n 	Describing an embedded heterogene
 ous system design\n 	Illustrating the AMD Versal adaptive SoC architecture
 \, NoC\, and AI Engine\n 	Describing an AMD Versal design tool flow\n 	Dev
 eloping HLS and AIE components using the AMD Vitis tool\n 	Utilizing the v
 ++ command line tools for component compilation\, linking\, and packaging 
 to run emulation\n 	Demonstrating the system design flow for a heterogeneo
 us embedded system using the AMD Vitis Unified IDE\n\n
ATTACH;FMTTYPE=image/jpeg:https://www.core-vision.nl/wp-content/uploads/20
 24/08/versal-workshop-2024-take-2.jpg
CATEGORIES:AMD,Embedded,FPGA,KRIA,MPSoC,Versal,Vitis,Vivado,Zynq
LOCATION:Core-Vision\, Cereslaan 24\, Heesch\, Netherlands\, 5384 VT\, Nede
 rland
X-APPLE-STRUCTURED-LOCATION;VALUE=URI;X-ADDRESS=Cereslaan 24\, Heesch\, Net
 herlands\, 5384 VT\, Nederland;X-APPLE-RADIUS=100;X-TITLE=Core-Vision:geo:
 0,0
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TZID:Europe/Amsterdam
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DTSTART:20260329T030000
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