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TZID:Europe/Amsterdam
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UID:596@core-vision.nl
DTSTART;TZID=Europe/Amsterdam:20250922T090000
DTEND;TZID=Europe/Amsterdam:20250923T170000
DTSTAMP:20250915T053742Z
URL:https://www.core-vision.nl/events/embedded-heterogeneous-design-6/
SUMMARY:Embedded Heterogeneous Design ✅
DESCRIPTION:✅ indicates CONFIRMED TO RUN courses\nCourse Description\nThi
 s course covers the AMD Versal™ architecture and illustrates the tool fl
 ow for developing HLS and AI Engine components as well as integrating an e
 ntire system project to design an embedded heterogeneous system using the 
 v++ tools and AMD Vitis™ Unified IDE.The emphasis is on:\n\n 	Describing
  an embedded heterogeneous system design\n 	Illustrating the AMD Versal ad
 aptive SoC architecture\, NoC\, and AI Engine\n 	Describing an AMD Versal 
 design tool flow\n 	Developing HLS and AIE components using the AMD Vitis 
 tool\n 	Utilizing the v++ command line tools for component compilation\, l
 inking\, and packaging to run emulation\n 	Demonstrating the system design
  flow for a heterogeneous embedded system using the AMD Vitis Unified IDE\
 n\n
ATTACH;FMTTYPE=image/jpeg:https://www.core-vision.nl/wp-content/uploads/20
 24/08/versal-workshop-2024-take-2.jpg
CATEGORIES:AMD,Embedded,FPGA,KRIA,MPSoC,Versal,Vitis,Vivado,Zynq
LOCATION:Core-Vision\, Cereslaan 24\, Heesch\, Netherlands\, 5384 VT\, Nede
 rland
X-APPLE-STRUCTURED-LOCATION;VALUE=URI;X-ADDRESS=Cereslaan 24\, Heesch\, Net
 herlands\, 5384 VT\, Nederland;X-APPLE-RADIUS=100;X-TITLE=Core-Vision:geo:
 0,0
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TZID:Europe/Amsterdam
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DTSTART:20250330T030000
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