Developing with ARM Cortex-M ONLINE

Standard Level – 5 sessions                                                 CEST time: 10:00 – 14:00

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PLEASE NOTE: This is a LIVE INSTRUCTOR-LED training event delivered ONLINE.

It covers the same scope and content, and delivers similar learning outcomes, as a scheduled face-to face class.

This course is designed for engineers developing software for platforms based around any of the ARM® Cortex®-M Series processors. The course includes an introduction to the ARM product range and supporting IP, the processor core, programmers’ model, instruction set and debug architecture. It includes a number of worked examples and hands-on CMSIS compliant exercises to reinforce the training material. It also includes content on the very latest M Series cores including the M7.

Hands-on Labs

The learning is reinforced with unique Lab exercises using ARM DS-5 instruction set simulators and covering assembly programming, exception handling and setting up caches and MMU.


The format of Live ONLINE training from Doulos is focused on delivery of a single 4 hour intensive session per day. This includes live tuition and class interaction with the Doulos subject matter expert during the full scope of each session.

Due to the heavy lecture content of this class, Labs are provided as additional homework. These are done with the Doulos lab platform providing individuals, instant access to a pre-configured working environment.

Who should attend?

Software engineers writing application and system software for platforms using any of the ARM Cortex-M processor cores, including M0, M0+, M3, M4 and M7.


  • Some knowledge of embedded systems
  • Basic awareness of ARM is useful but not essential
  • Knowledge of programming in C
  • Experience of assembler programming is not required but would be beneficial

Delegates should also have some knowledge of embedded systems, and a basic understanding of embedded programming in C and assembler.

Training materials

This class is based on source training material developed by ARM themselves, augmented with supplemental content and labs developed by Doulos. Doulos is a global ARM Approved Training Center.


The majority of the course content and sessions are relevant and of value for engineers developing products using platforms based on any of the current M Series family. In public class delivery contexts, the specific agenda followed may vary from that indicated below dependent on the focus and interests of the course participants attending that event. Upon registration, course participants will be asked to indicate which specific M Series core they are focusing on, which will steer the class agenda to some degree.

Note the course includes a valuable comparison of capabilities and application variance between different members of the M Series family which will be of benefit to evaluators as well as those preparing for project.

For private team-based training for software developers, the course can be focused entirely on a specific M Series core. The course descriptions for these courses can be found below:

For private team based training for system designers and integrators, there are also course options available:


Session 1

  • Introduction to ARM
    ARM as a company • Processor portfolio • Supported architectures • Processor profiles
  • Cortex-M Overview
    Block diagram • Architectural features • Instruction set • Programmer’s model • Memory map • Memory interfaces • Caches • Exception handing • Memory protection • Power management • Implementation options
  • Cortex-M Programmers’ Model
    Data types • Core registers • Modes, privileges and stack • Exceptions • Instruction set overview

Session 2

  • Assembly Programming
    Data processing instructions • Load/Store instructions • Flow control • Miscellaneous instructions
  • ARMv7-M Exception Handling
    Exception Model • Interrupts • Writing the vector table and interrupt handlers • Internal exceptions and RTOS support • Fault exception

Session 3

  • ARMv7-M Exception Handling
    Exception Model • Interrupts • Writing the vector table and interrupt handlers • Internal exceptions and RTOS support • Fault exception
  • ARMv7-M Memory Model
    Memory address space • Memory types and attributes • Alignment and endianness • Barriers
  • Understanding Barriers
    Data memory barrier • Data synchronization barrier • Instruction synchronization barrier • Barrier applications examples

Session 4

  • ARMv7-M Memory Protection
    Memory protection overview • Regions overview • Regions overlapping • Setting up the MPU
  • Embedded Software Development
    Default compilation behavior • System startup • Tailoring the image memory map to a device • Post startup initialization • Tailoring the C library to a device • Building and debugging an image

Session 5

  • ARMv7-M Synchronization
    Introduction to synchronization and semaphores • Exclusive accesses • Bit-banding
  • ARMv7-M Compiler Hints & Tips
    Basic Compilation • Compiler optimisations • Coding considerations • Mixing C/C++ and assembly • Local and global data issues
  • Appendix

Lab Exercises:

Our hands-on exercises are provided as a self contained virtual machine that can easily be taken away by the students by the end of the class. Our virtual machine works on most operating systems and features a full pre-configured embedded development environment based in industry de-facto standards such as GNU tools and Eclipse. The laboratories work both on pre-installed instruction set simulators and microcontroller development boards. Currently, project files support the ST Microelectronics’ STM32 and NXP’s FRDM boards. Infineon and Texas Instrument boards are currently supported by the tool suite but project files are to be added in the near future.

The exercises cover a large spectrum of topics; Starting with assembly programming, data transfers, data processing, flow control, digital signal processing. Exception handling with the implementation priority schemes and pre-emption. Mixing C and assembly to provide a semi-hosted solution.


03 augustus 2020 - 07 augustus 2020

Your home office


€ 0,00
41 Xilinx Training Credits

Training brochure


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