Request for online courses
Aankomende Evenementen
- Working with Devicetrees ✅ - 31/05/2023 - 11:00 - 12:00
- Essential Digital Design Techniques - 19/06/2023 - 20/06/2023 - 09:00 - 17:00
- Designing with the Versal ACAP: Network on Chip - 22/06/2023 - 09:00 - 17:00
- Developing AI Inference Solutions with the Vitis AI Platform - 29/06/2023 - 30/06/2023 - 09:00 - 17:00
- Comprehensive VHDL - 07/08/2023 - 11/08/2023 - 09:00 - 17:00
- VHDL for Designers - 07/08/2023 - 09/08/2023 - 09:00 - 17:00
- Advanced VHDL - 10/08/2023 - 11/08/2023 - 09:00 - 17:00
- Essential DSP Implementation Techniques for Xilinx FPGAs ✅ - 04/09/2023 - 05/09/2023 - 09:00 - 17:00
- Developing AI Inference Solutions with the Vitis AI Platform - 21/09/2023 - 22/09/2023 - 09:00 - 17:00
- Essential Digital Design Techniques - 02/10/2023 - 03/10/2023 - 09:00 - 17:00
- Designing with the Versal ACAP: Network on Chip - 04/10/2023 - 09:00 - 17:00
- Comprehensive VHDL - 23/10/2023 - 27/10/2023 - 09:00 - 17:00
- VHDL for Designers - 23/10/2023 - 25/10/2023 - 09:00 - 17:00
- Advanced VHDL - 26/10/2023 - 27/10/2023 - 09:00 - 17:00
- Designing with the UltraScale and UltraScale+ Architectures - 01/01/2050 - 10:00 - 18:00
- UltraFast Design Methodology - 01/01/2050 - 11:00 - 19:00
- Designing FPGAs Using the Vivado Design Suite 1 - 02/01/2050 - 09:00 - 17:00
- Designing FPGAs Using the Vivado Design Suite 2 - 02/01/2050 - 10:00 - 18:00
- Designing FPGAs Using the Vivado Design Suite 3 - 02/01/2050 - 11:00 - 19:00
- Designing FPGAs Using the Vivado Design Suite 4 - 02/01/2050 - 12:00 - 20:00