Training

Sharing is the new multiplying. Therefore, we regularly share our information and knowledge, even with our colleagues and competitors. As AMD Authorized Training Provider and Doulos Certified Training Partner, we offer a variety of FPGA training courses to broaden or deepen your knowledge. Furthermore, we are always ready to assist in solving complex issues.

Below you can find our training schedule. If the desired training is not listed or the date does not fit into your schedule, please contact us.

September 2024

Designing with Versal AI Engine: Quick Start

Designing with Versal AI Engine: Quick Start

16 September 2024
09:00 - 17:00
Course Description This course covers the AMD Versal™ AI Engine architecture and memory modules, programming the AI Engine (kernels and graphs), using the DSP Library, [...]
Designing with Versal AI Engine: Quick Start

Designing with Versal AI Engine: Quick Start

16 September 2024
09:00 - 17:00
Course Description This course covers the AMD Versal™ AI Engine architecture and memory modules, programming the AI Engine (kernels and graphs), using the DSP Library, [...]
Designing with Versal AI Engine: Architecture and Design Flow (1)

Designing with Versal AI Engine: Architecture and Design Flow (1)

17 September 2024 - 18 September 2024
09:00 - 17:00
Course Description This course describes the AMD Versal™ AI Engine architecture, how to program the AI Engines (single kernel programming and multiple kernel programming using [...]
Designing with Versal AI Engine: Architecture and Design Flow (1)

Designing with Versal AI Engine: Architecture and Design Flow (1)

17 September 2024 - 18 September 2024
09:00 - 17:00
Course Description This course describes the AMD Versal™ AI Engine architecture, how to program the AI Engines (single kernel programming and multiple kernel programming using [...]
Designing with Versal AI Engine: Graph Programming with AI Engine Kernels (2)

Designing with Versal AI Engine: Graph Programming with AI Engine Kernels (2)

19 September 2024 - 20 September 2024
09:00 - 17:00
Course Description This course describes the system design flow and interfaces that can be used for data movement in the Versal™ AI Engine. It demonstrates [...]
Designing with Versal AI Engine: Graph Programming with AI Engine Kernels (2)

Designing with Versal AI Engine: Graph Programming with AI Engine Kernels (2)

19 September 2024 - 20 September 2024
09:00 - 17:00
Course Description This course describes the system design flow and interfaces that can be used for data movement in the Versal™ AI Engine. It demonstrates [...]
Designing with the Versal ACAP: Network on Chip

Designing with the Versal ACAP: Network on Chip

23 September 2024
09:00 - 17:00
Course Description This course introduces the Versal® ACAP network on chip (NoC) to users familiar with other SoC architectures. Besides providing an overview of the [...]
Designing with the Versal ACAP: Network on Chip

Designing with the Versal ACAP: Network on Chip

23 September 2024
09:00 - 17:00
Course Description This course introduces the Versal® ACAP network on chip (NoC) to users familiar with other SoC architectures. Besides providing an overview of the [...]
Unleashing the Power of AMD Versal AI Engines: Navigating the SIMD Datapath ONLINE WORKSHOP ✅

Unleashing the Power of AMD Versal AI Engines: Navigating the SIMD Datapath ONLINE WORKSHOP ✅

26 September 2024 - 27 September 2024
09:30 - 13:30
Free ONLINE Workshop Unleashing the Power of AMD Versal AI Engines: Navigating the SIMD Datapath The Versal™ adaptive SoC from AMD is multi-featured, offering unprecedented [...]
Unleashing the Power of AMD Versal AI Engines: Navigating the SIMD Datapath ONLINE WORKSHOP ✅

Unleashing the Power of AMD Versal AI Engines: Navigating the SIMD Datapath ONLINE WORKSHOP ✅

26 September 2024 - 27 September 2024
09:30 - 13:30
Free ONLINE Workshop Unleashing the Power of AMD Versal AI Engines: Navigating the SIMD Datapath The Versal™ adaptive SoC from AMD is multi-featured, offering unprecedented [...]
Accelerating Applications with the Vitis Unified Software Environment

Accelerating Applications with the Vitis Unified Software Environment

30 September 2024 - 02 October 2024
09:00 - 17:00
€3.000,00
 / 30 Training Credits
Course Description Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting both data [...]
Accelerating Applications with the Vitis Unified Software Environment

Accelerating Applications with the Vitis Unified Software Environment

30 September 2024 - 02 October 2024
09:00 - 17:00
€3.000,00
 / 30 Training Credits
Course Description Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis™ unified software environment targeting both data [...]
Designing with the IP Integrator Tool

Designing with the IP Integrator Tool

30 September 2024 - 01 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description Explore the IP integrator tool and its features to gain the expertise needed to develop, implement, and debug different IPI block designs using [...]
Designing with the IP Integrator Tool

Designing with the IP Integrator Tool

30 September 2024 - 01 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description Explore the IP integrator tool and its features to gain the expertise needed to develop, implement, and debug different IPI block designs using [...]

October 2024

Developing AI Inference Solutions with the Vitis AI Platform ✅

Developing AI Inference Solutions with the Vitis AI Platform ✅

03 October 2024 - 04 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
✅ indicates CONFIRMED TO RUN courses Course Description Implement neural networks on cloud and edge platforms using the Vitis™ AI development platform. The emphasis of [...]
Developing AI Inference Solutions with the Vitis AI Platform ✅

Developing AI Inference Solutions with the Vitis AI Platform ✅

03 October 2024 - 04 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
✅ indicates CONFIRMED TO RUN courses Course Description Implement neural networks on cloud and edge platforms using the Vitis™ AI development platform. The emphasis of [...]
Using Vision-based Applications with the Kria KV260 Vision AI Starter Kit & System-on-Module

Using Vision-based Applications with the Kria KV260 Vision AI Starter Kit & System-on-Module

03 October 2024 - 04 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description This course will help you learn about the Xilinx Kria™ System-on-Module (SOM) and Kria KV260 Vision AI Starter Kit, enabling you to accelerate [...]
Using Vision-based Applications with the Kria KV260 Vision AI Starter Kit & System-on-Module

Using Vision-based Applications with the Kria KV260 Vision AI Starter Kit & System-on-Module

03 October 2024 - 04 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description This course will help you learn about the Xilinx Kria™ System-on-Module (SOM) and Kria KV260 Vision AI Starter Kit, enabling you to accelerate [...]
Designing FPGAs Using the Vivado Design Suite 1

Designing FPGAs Using the Vivado Design Suite 1

07 October 2024 - 08 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description This course offers introductory training on the Vivado® Design Suite and helps you to understand the FPGA design flow. The course provides experience [...]
Designing FPGAs Using the Vivado Design Suite 1

Designing FPGAs Using the Vivado Design Suite 1

07 October 2024 - 08 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description This course offers introductory training on the Vivado® Design Suite and helps you to understand the FPGA design flow. The course provides experience [...]
Designing FPGAs Using the Vivado Design Suite 3

Designing FPGAs Using the Vivado Design Suite 3

07 October 2024 - 08 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description Learn how to effectively employ timing closure techniques.This course includes: Demonstrating timing closure techniques such as baselining, pipelining, and synchronization circuits. Showing optimum HDL [...]
Designing FPGAs Using the Vivado Design Suite 3

Designing FPGAs Using the Vivado Design Suite 3

07 October 2024 - 08 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description Learn how to effectively employ timing closure techniques.This course includes: Demonstrating timing closure techniques such as baselining, pipelining, and synchronization circuits. Showing optimum HDL [...]
Designing FPGAs Using the Vivado Design Suite 2

Designing FPGAs Using the Vivado Design Suite 2

09 October 2024 - 10 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description Learn how to build a more effective FPGA design: The focus is on: Using synchronous design techniques. Utilizing the Vivado® IP integrator to [...]
Designing FPGAs Using the Vivado Design Suite 2

Designing FPGAs Using the Vivado Design Suite 2

09 October 2024 - 10 October 2024
09:00 - 17:00
€2.000,00
 / 20 Training Credits
Course Description Learn how to build a more effective FPGA design: The focus is on: Using synchronous design techniques. Utilizing the Vivado® IP integrator to [...]
1 2 3 4
linkedin facebook pinterest youtube rss twitter instagram facebook-blank rss-blank linkedin-blank pinterest youtube twitter instagram