Zynq UltraScale+ MPSoC: Boot and Platform Management

Zynq UltraScale+ MPSoC: Boot and Platform Management

When

05 March 2025 - 06 March 2025     
09:00 - 17:00

Reserve

Reservation closed

Where

Core-Vision
Cereslaan 24, 5384 VT, Heesch
Netherlands

Event type

Information

Map Unavailable

Course Description

This course provides software developers responsible for booting and platform management with an overview of the capabilities and support for the AMD Zynq™ UltraScale+™ MPSoC

The emphasis is on:

  • Reviewing the catalog of OS implementation options, including hypervisors and various Linux® implementations
  • Booting and configuring a system
  • Applying various power management techniques for the Zynq UltraScale+ MPSoC


What's New for 2024.1

  • All labs have been updated according to the latestsoftware version.
  • Labs for PMU: System Power Management and Detecting a Failed Linux Boot have been added

Level

Embedded Software 3

Course Duration

2 days

Audience

Software developers interested in understanding the boot process, including creating bootable images, FSBL topics, and the platform management unit (PMU).

Prerequisites

  • General understanding of C coding
  • Familiarity with issues related to complex embedded systems

Software ToolsVitis Unified IDE

  • Vivado™ Design Suite 2024.1
  • Vitis™ Unified IDE 2024.1
  • Hardware emulation environment:
    • VirtualBox/CloudShare
    • QEMU
    • Ubuntu® desktop
    • PetaLinu

Hardware

  • Zynq UltraScale+ MPSoC ZCU104 board*
  • Versal adaptive SoC VCK190 board board*

* This course focuses on the Zynq UltraScale+ and Versal architectures. Check with your local Authorized Training Provider for the specifics of the in-class lab environment or other customizations..

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:Leverage the innate capabilities of the application processing unit
(APU) and real-time processing unit (RPU)

  • Define the underlying implementation of the application processing unit (APU) and real-time processing unit (RPU) to make best use of their capabilities
  • Explore the capabilities of the platform management unit (PMU)
  • Create bootable images
  • Manage hardware/software co-debugging

Course Outline

Day 1

  • Application Processing Unit - Introduction to the members of the APU, specifically the Arm® Cortex®-A53 processor and how the cluster is configured and managed. {Lectures, La
  • Real-Time Processing Unit - Focuses on the real-time processing module (RPU) in the PS,which is comprised of a pair of Arm Cortex processors and supporting elements. {Lectures, Demo, Lab}
  • Power Management - Overview of the PMU and the power-saving features of the device. {Lecture}
  • Power Domains  - Investigate the granularity of the power control within the device. {Lecture, Lab}
  • QEMU- Introduction to the Quick Emulator, which is the tool used to run software for a device when hardware is not available. {Lectures, Demo, Labs}
  • PMU - Introduction to the concepts of power requirements in embedded systems and the Zynq UltraScale+ MPSoC. {Lectures}

Day 2

  • Booting - How to implement the embedded system, including the boot process and boot image creation. {Lectures, Labs}
  • FSBL - Demonstrates the process of developing, customizing, and debugging this mandatory piece of code. {Lectures, Demo}
  • Debugging Using Cross-Triggering -  Illustrates how HW-SW cross-triggering techniques can uncover issues. {Lecture, Lab

Request

Reservations can no longer be made for this event.

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