✅ indicates CONFIRMED TO RUN
Standard Level - 2 sessions (4 hours per session including breaks)
With thanks to AMD for sponsoring this workshop:
It is available to attend FREE OF CHARGE (Usual price $990)
April 23 & 24, 2026 - EurAsia - Register now »
April 23 & 24, 2026 - Americas - Register now »
It will provide an overview of the HLS design process, explain the component development flow, demonstrate how to explore design alternatives using directives and provide an introduction to interfacing the accelerated hardware block.
Further details will be provided to optimize performance by optimizing dataflows and pipelining.
The workshop is designed to maximize individual engagement and learning. Each attendee is encouraged to informally ask pertinent questions throughout, to actively participate in the learning process.
For more information visit the Doulos website
