Expert VHDL Verification

Expert VHDL Verification

When

26 February 2025 - 28 February 2025     
09:00 - 17:00

Reserve

€2.925,00
 / 45  Training Credits
On request

Where

Core-Vision
Cereslaan 24, 5384 VT, Heesch
Netherlands

Event type

Information

Map Unavailable

indicates CONFIRMED TO RUN courses

Course Description

Expert VHDL Verification is a 3 days course as part of the intensive 5-day Expert VHDL class.

  • Expert VHDL Verification (3 days) is for design engineers and verification engineers involved in VHDL test bench development or behavioural modelling for the purpose of functional verification. Advanced VHDL language constructs are presented using a practical testbench methodology as an example. The alternative OSVVM and UVVM methodologies are then introduced and all three methodologies compared and contrasted.

The modules, which may be attended together or independently, follow on from the industry standard class, Comprehensive VHDL. Carefully designed workshops comprise approximately 50% of teaching time, and enable engineers to apply their new skills in the context of the latest VHDL design tools, practices and methodologies.


Audience

  • Design engineers wishing to improve the efficiency of their hardware designs and increase productivity
  • Design and verification engineers who want to structure and write effective test environments to verify complex designs and systems

What will you learn?

  • The principles and details of how to approach the problem of design verification using VHDL
  • How to structure and write large and complex VHDL structured verification environments
  • The OSVVM and UVVM VHDL verification methodologies

Pre-requisites

This is an advanced language and methodology training class. Prior attendance of the Doulos Comprehensive VHDL class (or equivalent) is required,.and at least 6 months of 'live' project experience using VHDL is strongly recommended. Delegates attending the Expert Design module must have knowledge and experience of register transfer level coding and synthesis using VHDL.

Training materials

Doulos training materials are renowned as the most comprehensive and user friendly available. Their style, content and coverage is unique in the HDL training world.and has made them sought after resources in their own right. Class fees include:

  • Fully indexed class notes creating a complete reference manual
  • Workbook full of practical examples to help you apply your knowledge
  • Doulos Golden Reference Guide for language, syntax, semantics and tips
  • Tour guides (to support the tools and technologies of your choice).

Request

Tickets

Exp-VHDL-VER

€2.925,00

Registration information

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