Designing with Versal AI Engine: Quick Start

Designing with Versal AI Engine: Quick Start

When

16 September 2024     
09:00 - 17:00

Reserve

Reservation closed

Where

Core-Vision
Cereslaan 24, 5384 VT, Heesch
Netherlands

Event type

Information

Map Unavailable

Course Description

This course covers the AMD Versal™ AI Engine architecture and memory modules, programming the AI Engine (kernels and graphs), using the DSP Library, developing AI Engine designs using AMD Vitis™ Model Composer, and debugging the AI Engines.

The emphasis of this course is on:

  • Illustrating the AI Engine architecture and memory modules
  • Describing the Vitis and AI Engine tool flow
  • Programming the AI Engine with kernels and graphs
  • Utilizing the Vitis DSP library
  • Creating AI Engine designs using Vitis Model Composer
  • Describing the debugging methodology for AI Engines


What's New for 2024.1

  • All the labs have been updated to the latest software versions

Level

ACAP 1

Course Duration

1 day

Audience

Software and hardware developers, system architects, DSP users, and anyone who needs to accelerate their software applications using our devices

Prerequisites

  • Comfort with the C/C++ programming language
  • Software development flow
  • Vitis tool for application acceleration development flow

Software Tools

  • Vitis Unified IDE 2024.1
  • Vitis Model Composer 2024.1

Hardware

  • Architecture: Versal adaptive SoCs

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:

  • Describe the AMD Versal adaptive SoC and the architecture of the AI Engine
  • Describe the toolchain for Versal AI Engine programming and the full application acceleration flow with the AMD Vitis Unified IDE
  • Program the AI Engines for single and multiple kernels using graphs
  • Utilize the AI Engine DSP library and create a filter design in the Vitis tool
  • Design a filter with the AMD Vitis Model Composer AI Engine library

Course Outline

Day 1

  • Versal AI Engine Architecture
    • Introduction to the AMD Versal AI Engine Architecture - Describes the Versal adaptive SoC at a high level. Also introduces the architecture of the AI Engine and its memory modules and interfaces. {Lecture}
  • Vitis Tool Flow
    • Versal AI Engine Tool Flow - Reviews the Vitis tool flow for the AI Engine and demonstrates the full application acceleration flow for the Vitis platform. {Lecture, Labs}
  • The Programming Model
    • AI Engine Programming: Kernels and Graphs - Describes AI Engine kernels and Adaptive Data Flow (ADF) graphs along with their programming flows. {Lecture, Lab}
  • Libraries
    • AI Engine DSP Library Overview - Provides an overview of the available DSP library, which enables faster development and comes with ready-to-use example design that help with using the library and tools. {Lecture, Lab}
  • Vitis Model Composer

    • Vitis Model Composer for AI Engine Design - Describes the Vitis Model Composer tool and how to use the libraries available with the tool for AI Engine design development. {Lecture, Lab}
  • Debugging
    • Versal AI Engine Application Debug and Event Trace - Reviews the debugging methodology for AI Engine designs. {Lecture}

Request

Reservations can no longer be made for this event.

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